Digital variable in-lock range phase comparator
US5619148A · kind A · utility
120Cited by
16References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 10, 1995 |
| Grant date | Apr 8, 1997 |
| Priority date | — |
| Expiry date | Oct 10, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D13/004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A novel method and apparatus providing an all digital phase comparator of two binary signals which employs a type of cross correlation of two binary signals and provides a 2bit binary word uniquely representative of phase alignment. The method can be carried out using a pair of flip-flop (FF) circuits, each FF having a docking input and a data input, and where each FF has a delay in series with its data input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.