Methods of making multi-tier laminate substrates for electronic device packaging
US5622588A · kind A · utility
42Cited by
23References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 2, 1995 |
| Grant date | Apr 22, 1997 |
| Priority date | — |
| Expiry date | Feb 2, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T156/1074
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is disclosed for making multi-tier laminate substrates for electronic device packaging including providing a first laminating layer and a second laminating layer, each having a trace on a first side. These layers are laminated with a spacer layer and dielectric layers. A window is made in each of the spacer and the dielectric layers. After laminating the layers together, vias are formed. Then an opening is made in the first laminating layer that corresponds to the window openings in order to produce a cavity in the laminated structure for placing an electronic device therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.