Method of making a low power, high performance junction transistor
US5622880A · kind A · utility
135Cited by
7References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1995 |
| Grant date | Apr 22, 1997 |
| Priority date | — |
| Expiry date | Mar 31, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
Abstract
Low threshold voltage MOS devices having buried electrodes are disclosed herein. Such devices have source and drain regions which include tip regions and plug regions. The buried electrodes have bottom boundaries located above the bottoms of the plug regions. The buried electrode has the same conductivity type as the device's bulk (albeit at a higher dopant concentration) and, of course, the opposite conductivity type as the device's source and drain. The exact dopant concentrations and locations of the buried electrodes should be provided such that punch through is avoided in MOS devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.