Patent · US Expired

Deep trench dram process on SOI for low leakage DRAM cell

US5627092A · kind A · utility

175Cited by
30References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 26, 1994
Grant dateMay 6, 1997
Priority date
Expiry dateSep 26, 2014

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/201

Abstract

A deep trench DRAM cell is formed on a silicon on isolator (SOI) substrate, with a buried strap formed by outdiffusion of dopant in associated trench node material, for providing an electrical connection between the trench node and the active area of a MOS transfer gate formed in the substrate adjacent the trench in an uppermost portion of the substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.