Inventor · San Jose, CA, US

Johann Alsmeier

246Patents

47h-index

159Co-inventors

93Inventor score

Filing activity: Jun 30, 1994 → Jul 13, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US9449987B1	Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors	Electricity	391	Active
US8187936B2	Ultrahigh density vertical NAND memory device and method of making thereof	Electricity	294	Active
US8349681B2	Ultrahigh density monolithic, three dimensional vertical NAND memory device	Electricity	262	Active
US9230973B2	Methods of fabricating a three-dimensional non-volatile memory device	Electricity	203	Active
US9227456B2	Memories with cylindrical read/write stacks	Physics	181	Active
US5627092A	Deep trench dram process on SOI for low leakage DRAM cell	Electricity	175	Expired
US8824183B2	Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof	Electricity	155	Active
US8193054B2	Ultrahigh density vertical NAND memory device and method of making thereof	Electricity	146	Active
US8198672B2	Ultrahigh density vertical NAND memory device	Electricity	141	Active
US8658499B2	Three dimensional NAND device and method of charge trap layer separation and floating gate formation in the NAND device	Electricity	137	Active
US9023719B2	High aspect ratio memory hole channel contact formation	Electricity	133	Active
US8878278B2	Compact three dimensional vertical NAND and method of making thereof	Electricity	120	Active
US8283228B2	Method of making ultrahigh density vertical NAND memory device	Electricity	118	Active
US9530790B1	Three-dimensional memory device containing CMOS devices over memory stack structures	Electricity	108	Active
US9230987B2	Multilevel memory stack structure and methods of manufacturing the same	Electricity	107	Active
US8884357B2	Vertical NAND and method of making thereof using sequential stack etching and landing pad	Electricity	99	Active
US8847302B2	Vertical NAND device with low capacitance and silicided word lines	Electricity	94	Active
US10629616B1	Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer	Electricity	93	Active
US8946023B2	Method of making a vertical NAND device using sequential etching of multilayer stacks	Electricity	87	Active
US6235574A	High performance DRAM and method of manufacture	Electricity	85	Expired
US9502471B1	Multi tier three-dimensional memory devices including vertically shared bit lines	Electricity	83	Active
US8445347B2	3D vertical NAND and method of making thereof by front and back side processing	Electricity	81	Active
US8614126B1	Method of making a three-dimensional memory array with etch stop	Electricity	77	Active
US9576975B2	Monolithic three-dimensional NAND strings and methods of fabrication thereof	Electricity	72	Active
US9570463B1	Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same	Electricity	72	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.