Power device integrated structure with low saturation voltage

US5631483A · kind A · utility

Assignee

• SGS-Thomson Microelectronics S.A. · IT

Inventors

• Giuseppe Ferla · Catania, IT
• Ferruccio Frisina · Gravina di Catania, IT

Key dates

• Filing date: Aug 1, 1995
• Grant date: May 20, 1997
• Expiry date: Aug 1, 2015

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D12/441

Abstract

A power device integrated structure includes a semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type superimposed over the substrate, a plurality of first doped regions of the first conductivity type formed in the semiconductor layer, and a respective plurality of second doped regions of the second conductivity type formed inside the first doped regions. The power device includes: a power MOSFET having a fisrt electrode region formed by the second doped regions and a second electrode region formed by the semiconductor layer; a first bipolar junction transistor having an emitter, a base and a collector respectively formed by the substrate, the semiconductor layer and the first doped regions; and a second bipolar junction transistor having an emitter, a base and a collector respectively formed by the second doped regions, the first doped regions and the semiconductor layer. The doping profiles of the semiconductor substrate, the semiconductor layer, the first doped regions and the second doped regions are such that the first and second bipolar junction transistors have respective first and second common base current gains sufficient…