Microprocessor having power management circuitry with coprocessor support
US5632037A · kind A · utility
47Cited by
17References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 1992 |
| Grant date | May 20, 1997 |
| Priority date | — |
| Expiry date | Mar 27, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing unit includes a plurality of subcircuits and circuitry for generating clock signals thereto. Detecting circuitry detects the assertion of a first signal indicative of a request for suspending operation of the processing unit and the assertion of a second signal indicating the state of operation of a coprocessing unit. Disabling circuitry is operable to disable clock signals to one or more of the subcircuits responsive to the first and second control signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.