Method of programming a nonvolatile flash-EEPROM memory array using source line switching transistors
US5633822A · kind A · utility
24Cited by
4References
3Claims
0Family size
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Key dates
| Filing date | Jun 2, 1995 |
| Grant date | May 27, 1997 |
| Priority date | — |
| Expiry date | Jun 2, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for writing cells in a memory which reduces errors caused by depleted memory array cells being turned on even when not selected. In the method, nonselected bit lines and nonselected word lines are biased so that the threshold voltage of the nonselected cells increases. In particular, the nonselected bit lines are left floating and the nonselected word lines are set to a zero voltage. Appropriate potentials are applied to the selected word line, selected bit line, and selected source line in order to program the selected cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.