Programmable built-in self test method and controller for arrays
US5633877A · kind A · utility
30Cited by
2References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 31, 1995 |
| Grant date | May 27, 1997 |
| Priority date | — |
| Expiry date | May 31, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An array built-in self test system has a scannable memory elements and a controller which, in combination, allow self test functions (e.g. test patterns, read/write access, and test sequences) to be modified without hardware changes to the test logic. Test sequence is controlled by logical test vectors, which can be changed, making the task of developing complex testing sequences relatively easy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.