Method and apparatus for generating a zero bit status flag in a microprocessor
US5638312A · kind A · utility
13Cited by
2References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 3, 1995 |
| Grant date | Jun 10, 1997 |
| Priority date | — |
| Expiry date | Mar 3, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for generating a zero flag (z-flag) status signal in a microprocessor includes a z-flag signal generator that generates a z-flag signal from unaligned data simultaneous to the load alignment of such data. The z-flag generator first performs a zero detect on each byte of data retrieved from memory. The zero detect results are next decoded according to bit selection signals generated from a data format code which corresponds to the specific format of the retrieved data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.