IC fault analysis system having charged particle beam tester
US5640098A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 1996 |
| Grant date | Jun 17, 1997 |
| Priority date | — |
| Expiry date | Jan 30, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31912
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An IC fault analysis system which is capable of accurately correlating mask layout data and/or net listing data associated with CAD (computer aided design) data developed in the IC design and an image obtained by a non-contact type tester such as an electron beam tester. The IC fault analysis system includes a circuit diagram display for showing a circuit diagram of the IC device under test based on the CAD data, a mask layout display for showing a mask layout of the IC device under test based on the CAD data, a contrast image display for showing a potential distribution of the IC device under test obtained in the non-contact type tester, an input means connected to the circuit diagram display for specifying a circuit component of the IC device under test, a comparison means for comparing the circuit diagram of the circuit component defined by the input means and contrast image corresponding to the circuit component, and a comparison data memory for storing the comparison data of the comparison means and providing the comparison data to the contrast image display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.