Loop filter level detection circuit and method
US5642082A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 20, 1996 |
| Grant date | Jun 24, 1997 |
| Priority date | — |
| Expiry date | Jun 20, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0812
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A loop circuit such as a delay lock loop or a phase lock loop includes circuitry for detecting when the output signal of the low-pass filter in the loop has either risen to a voltage which is relatively close to the power voltage of the circuit or has fallen to a voltage which is relatively close to the ground voltage of the circuit. In either case the circuitry reverses the significance of the phase frequency detector output signals that control whether the output voltage of the low-pass filter rises or falls. Alternatively or in addition, the phase frequency detector may be reset. Coarser adjustments may be made to the loop circuit downstream from the low-pass filter in response to a recurrence of the low-pass filter output voltage reaching either of the detected voltages mentioned above.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.