Upgradable multi-chip module
US5648890A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1995 |
| Grant date | Jul 15, 1997 |
| Priority date | — |
| Expiry date | Sep 22, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate, an alignment plate, a heat sink, a back plate, a plurality of spacers, and a plurality of nuts are used to removably package one or more semiconductor package into a single module. The semiconductor dies are packaged with tape automated bonding (TAB) packages having land grid array (LGA) outer lead bumps. The substrate comprises a number of land patterns, a number of alignment cavities, and a number of join cavities. The alignment plate is fabricated with a number of alignment pins, a number of housing cavities, and a number of join cavities. The heat sink is fabricated with a number of stems and a number of join cavities. The back plate is fabricated with a number of extrusions having threaded ends. The spacers are fabricated with flanged openings at both ends, and each spacer is loaded with a number of spring washers. The nuts are fabricated with stepped heads. The extrusions, the land patterns and the alignment and join cavities of the substrate, the alignment pins and the housing and join cavities of the alignment plate, the stems and the join cavities of the heat sink, the spring washer loaded spacers, and the stepped head nuts are coordinated in their numbers, si…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.