Method of making asymmetric low power MOS devices
US5650340A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 1995 |
| Grant date | Jul 22, 1997 |
| Priority date | — |
| Expiry date | May 31, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
Low threshold voltage MOS devices having asymmetric halo implants are disclosed herein. An asymmetric halo implant provides a pocket region located under a device's source or drain near where the source (or drain) edge abuts the device's channel region. The pocket region has the same conductivity type as the device's bulk (albeit at a higher dopant concentration) and, of course, the opposite conductivity type as the device's source and drain. Only the source or drain, not both, have the primary pocket region. An asymmetric halo device behaves like two pseudo-MOS devices in series: a "source FET" and a "drain FET." If the pocket implant is located under the source, the source FET will have a higher threshold voltage and a much shorter effective channel length than the drain FET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.