Semiconductor device having a passivation layer
US5650638A · kind A · utility
12Cited by
14References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 8, 1995 |
| Grant date | Jul 22, 1997 |
| Priority date | — |
| Expiry date | May 8, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises at least one semiconductor layer (1-3) of SiC and a layer (6) applied on at least a portion of an edge surface (19) of said SiC-layer so as to passivate this edge surface portion. At least the portion of said passivation layer closest to said edge surface portion of the SiC-layer is made of a first crystalline material, and the passivation layer comprises a portion made of a second material having AIN as only component or as a major component of a crystalline alloy constituting said second material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.