Voltage-level shifter
US5650742A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 1995 |
| Grant date | Jul 22, 1997 |
| Priority date | — |
| Expiry date | Mar 29, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a voltage-level shifter, a P-channel MOS transistor (early cut-off circuit) is interposed between a voltage source of the voltage-level shifter and a source of a P-channel MOS transistor which tends to be turned on when a voltage of a voltage source of an input signal supplies a low voltage or a large potential difference exists between the voltage source of the input signal and the voltage source of the voltage-level shifter, and is supplied on its gate with the input signal of the voltage-level shifter. Accordingly, the interposed P-channel MOS transistor is turned off prior to the P-channel MOS transistor having a tendency of being turned on, so that the voltage level of the output signal of the voltage-level shifter can be rapidly fixed at the "L" level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.