Method and apparatus for writing and erasing flash memory
US5650967A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 6, 1995 |
| Grant date | Jul 22, 1997 |
| Priority date | — |
| Expiry date | Jul 6, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/066
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A DRAM-compatible nonvolatile memory includes a FLASH memory and a logic controller. The logical controller accepts conventional DRAM command protocol and accepts data and addresses from DRAM data and address buses, respectively. The logic controller responds to repeated CAS-before-RAS signals and a write enable signal to initiate block erases and writes to the FLASH memory. The nonvolatile, DRAM-compatible memory is incorporated in a package having the same pin structure as a conventional DRAM package, such that the nonvolatile, DRAM-compatible memory can be mounted in a DRAM mount, such as a socket. Because the nonvolatile, DRAM-compatible memory can share common data, address, and command lines with conventional DRAMs, a single memory card can be produced containing both conventional DRAMs and the nonvolatile, DRAM-compatible memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.