Process for fabricating dual-gate CMOS having in-situ nitrogen-doped polysilicon by rapid thermal chemical vapor deposition

US5652166A · kind A · utility

Assignee

• UNITED MICROELECTRONICS CORP. · TW

Inventors

• Shi-Chung Sun · Hsinchu, TW
• Lin Wang · Hockessin, US

Key dates

• Filing date: Jan 11, 1996
• Grant date: Jul 29, 1997
• Expiry date: Jan 11, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0177

Abstract

A process for fabricating dual-gate CMOS of semiconductor devices having in-situ nitrogen-doped polysilicon by rapid thermal chemical vapor deposition in a rapid thermal reactor is disclosed. The process comprises the steps of first fabricating components of the dual-gate CMOS on a semiconductor silicon substrate. The dual-gate CMOS components includes P- and N-wells and source/drain regions formed in the silicon substrate. Gate oxide for the dual-gate CMOS is then grown. A thin nitrogen-doped polysilicon film is then deposited over the gates, and followed by the deposition of a undoped polysilicon film, which covers over the surface of the thin nitrogen-doped polysilicon film. Ions are then implanted into the dual-gates CMOS. In the process, the thin nitrogen-doped polysilicon film is deposited by introducing SiH.sub.4 and NH.sub.3 gas mixture into the rapid thermal reactor under a pressure of about 0.4 torr at about 750.degree. C. The thin nitrogen-doped polysilicon film has a thickness of about 60 .ANG.. The undoped polysilicon film is formed by deposition of SiH.sub.4 after the NH.sub.3 gas is evacuated from the rapid thermal reactor, and has a thickness of about 2,000 to 3,000…