Patent · US Expired

Well resistor for ESD protection of CMOS circuits

US5654860A · kind A · utility

24Cited by
4References
28Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 16, 1995
Grant dateAug 5, 1997
Priority date
Expiry dateAug 16, 2015

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D89/811

Abstract

A circuit for providing electrostatic discharge (ESD) protection is disclosed. The circuit comprises a pair of CMOS field effect pull up and pull down transistors with reduced resistance source and drain, having a well resistor formed external to them between supply and ground busses respectively. During an ESD event, the well resistors serve to both limit the current flow through the transistors, and reduce the voltage drop across them.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.