Hierarchical display list processing in graphics data retrieval system
US5657479A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 1995 |
| Grant date | Aug 12, 1997 |
| Priority date | — |
| Expiry date | Dec 4, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hierarchical display list system and efficient processing method for same. The system provides a display list having discontiguous display list segments and an information retrieval system for same (e.g. DMA controller in one embodiment). Each display list segment (DLS) contains a call to a next to be processed DLS or a return. The call includes a push (which indicates the address of the return DLS) and also a jump control data (which indicates the address of the next to be processed DLS. The push and jump and also contain the length of the respective DLS's involved. DLSs can also contain return control data which include a POP and a jump. Nesting (e.g. the display list control path) is maintained by a display list stack. The discontiguous DLSs are separately stored in memory of the host processor. According to the system, the information for traversing the hierarchical display list is stored in the display list itself so the host processor is not required for display list processing aside from initializing the rendering procedure. In an improvement embodiment, the transfer control information (e.g., call and return) are placed in the front of the DLS so that the information retr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.