Electrically programmable and erasable nonvolatile semiconductor memory device and operating method therefor
US5659505A · kind A · utility
39Cited by
14References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 1995 |
| Grant date | Aug 19, 1997 |
| Priority date | — |
| Expiry date | Jul 31, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/683
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In erasing, electrons are simultaneously injected into floating gates from sources of a plurality of memory cells. Thus, the threshold voltages of the plurality of memory cells are increased. In programming, electrons are emitted from a floating gate of a selected memory cell to a drain. Thus, the threshold voltage of the selected memory cell is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.