Vertical power mosfet having thick metal layer to reduce distributed resistance
US5665996A · kind A · utility
256Cited by
8References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1994 |
| Grant date | Sep 9, 1997 |
| Priority date | — |
| Expiry date | Dec 30, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The on-resistance of a vertical power transistor is substantially reduced by forming a thick metal layer on top of the relatively thin metal layer that is conventionally used to make contact with the individual transistor cells in the device. The thick metal layer is preferably plated electrolessly on the thin metal layer through an opening that is formed in the passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.