Integrated circuit clocking technique and circuit therefor
US5668492A · kind A · utility
19Cited by
18References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 1996 |
| Grant date | Sep 16, 1997 |
| Priority date | — |
| Expiry date | Mar 13, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318552
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A globally distributed system clock is received and selectively gated by local clock generators responsive to global control signals. The local clock generators, which are located proximately to sequential circuits having serial scan paths, produce scan and functional clock signals adapted to the sequential circuits, which may have a variety of required timing diagrams.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.