Enhancement-type semiconductor having reduced leakage current
US5675167A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 1995 |
| Grant date | Oct 7, 1997 |
| Priority date | — |
| Expiry date | Nov 24, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
Abstract
A semiconductor device having an enhancement-type MOS structure which can prevent large leakage current is disclosed. A high-concentration region for threshold-value regulation use formed in a channel region below a gate electrode in an enhancement-type transistor is caused to be contiguous with a source region and not contiguous with a drain region. Herein, the distance between the high-concentration region and the drain region is set so as to preclude the depletion layer extending from the drain region side from reaching the high-concentration region. Therefore, the electrical field in the depletion layer does not become the critical field which causes avalanche or Zener breakdown, and so leakage current can be caused to be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.