Power control of circuit modules within an integrated circuit
US5675808A · kind A · utility
80Cited by
37References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 2, 1994 |
| Grant date | Oct 7, 1997 |
| Priority date | — |
| Expiry date | Nov 2, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/026
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power control and memory refresh rate management circuit is described. The power control circuit provides circuitry for selectively disabling or enabling modular logic circuit blocks within a VLSI integrated circuit under program control from an external processor, or for suspended circuit operation in general. In low-power modes external memory refresh signal generation circuits are provided with a low-frequency oscillator signal to conserve power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.