Signal transition detector circuit
US5680066A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 1994 |
| Grant date | Oct 21, 1997 |
| Priority date | — |
| Expiry date | Jan 13, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017518
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device which includes at least one of (1) an input buffer circuit formed of an input level converter and a non-inverting buffer circuit and an inverting buffer circuit each including BiCMOS circuitry which effects high-speed operation; (2) a decoder circuit formed of plural logic gates each of which is composed of the combination of MOS and bipolar circuitry; (3) a sense amplifier circuit including a multiemitter transistor; (4) a signal or address transition detector circuit which includes input circuits each receiving, for example, an address signal of a voltage amplitude and outputting a current amplitude signal in response to a change in level of the address signal, and a detector circuit connected thereto which has a cascode amplifier arranged such that it receives current amplitude signals at an input thereof and in which the cascode amplifier input is maintained at a substantially constant voltage, in which the detection circuit detects a transition of one or more of the current amplitude signals and, in response thereto, generates an ATD signal of a voltage amplitude; and (5) an output buffer circuit, in which the decoder, sense amplifier and output buffer o…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.