Cache column timing control
US5680569A · kind A · utility
6Cited by
24References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 21, 1995 |
| Grant date | Oct 21, 1997 |
| Priority date | — |
| Expiry date | Sep 21, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache which includes an integrated timing circuit through which the cache control passes thus allowing the timing of the storage circuit of the cache core to be adjusted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.