High speed three-state sampling
US5682337A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 1995 |
| Grant date | Oct 28, 1997 |
| Priority date | — |
| Expiry date | Apr 13, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3193
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention describes a novel method and apparatus for sampling an input/output pin of an electronic device at high speeds, comprising the steps of: driving the device input/output pin through a series resistor with a middle voltage between the high and low voltages of the device; sampling and latching the voltage at the input/output pin; comparing the latched voltage at the device input/output pin with a high threshold voltage which is between the high voltage of the device and the middle voltage; comparing the latched voltage at the device input/output pin with a low threshold voltage which is between the low voltage of the device and the middle voltage; and using the results of the two comparisons to determine whether the device input/output pin is driving high, driving low, or in an input mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.