Method for producing a diode
US5686319A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 1995 |
| Grant date | Nov 11, 1997 |
| Priority date | — |
| Expiry date | Oct 10, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/983
Abstract
In a method for producing a diode, a first, strongly positively doped silicon wafer is bonded in accordance with the silicon fusion method to a second, weakly negatively doped silicon wafer, and subsequently the weakly negatively doped second silicon wafer is ground down to a predetermined thickness. A chromium layer which contains a small percentage of arsenic is used for resistive contact-making on the negatively doped second silicon wafer. In this way, a diode is obtained which has a small forward voltage in conjunction with a precise breakdown voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.