Method of manufacturing a gate structure for a metal semiconductor field effect transistor
US5688703A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 1995 |
| Grant date | Nov 18, 1997 |
| Priority date | — |
| Expiry date | Sep 5, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a gate structure (19) for a semiconductor device (10) utilizes a dielectric layer (17) containing aluminum to protect the surface of a substrate (11) from residues resulting from deposition and etching of the gate structure (19). The gate structure (19) forms a refractory contact to the substrate (11), and the source and drain regions (26) are self-aligned to the gate structure (19). Semiconductor devices manufactured using methods in accordance with the present invention are observed to have a higher breakdown voltage and a higher transconductance, among other improved electrical performance characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.