Method of implementing fast 486TM microprocessor compatible string operations
US5692146A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 1995 |
| Grant date | Nov 25, 1997 |
| Priority date | — |
| Expiry date | May 26, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An efficient method for implementing string operations used to process blocks of data within a memory. The registers used to track the memory addresses are updated and committed before the outcome of a read or write address operation is known. In the event an exception occurs, exception handling hardware and microcode is used to restore the state of the registers to the condition they were in prior to the iteration which produced the exception. This reduces the number of microcode instructions required to implement the string operation, producing a faster cycling of the code through multiple iterations. The result is a more optimal code for string operations and a decrease in the time required to carry out the string instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.