Narendra Sankar
26Patents
12h-index
11Co-inventors
74Inventor score
Filing activity: May 26, 1995 → Mar 7, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6477562B2 | Prioritized instruction scheduling for multi-streaming processors | Physics | 116 | Expired |
| US6389449B1 | Interstream control and communications for multi-streaming digital processors | Physics | 114 | Expired |
| US7020879B1 | Interrupt and exception handling for multi-streaming digital processors | Physics | 97 | Expired |
| US6292888A | Register transfer unit for electronic processor | Physics | 63 | Expired |
| US6789100B2 | Interstream control and communications for multi-streaming digital processors | Physics | 51 | Expired |
| US7032226B1 | Methods and apparatus for managing a buffer of events in the background | Physics | 40 | Expired |
| US7139898B1 | Fetch and dispatch disassociation apparatus for multistreaming processors | Physics | 39 | Expired |
| US7502876B1 | Background memory manager that determines if data structures fits in memory with memory state transactions map | Physics | 37 | Expired |
| US5699506A | Method and apparatus for fault testing a pipelined processor | Physics | 18 | Expired |
| US5752273A | Apparatus and method for efficiently determining addresses for misaligned data stored in memory | Physics | 16 | Expired |
| US5692146A | Method of implementing fast 486TM microprocessor compatible string operations | Physics | 16 | Expired |
| US7058064B2 | Queueing system for processors in packet routing operations | Electricity | 13 | Expired |
| US7467385B2 | Interrupt and exception handling for multi-streaming digital processors | Physics | 12 | Active |
| US7529907B2 | Method and apparatus for improved computer load and store operations | Physics | 7 | Active |
| US5546353A | Partitioned decode circuit for low power operation | Physics | 7 | Expired |
| US7715410B2 | Queueing system for processors in packet routing operations | Electricity | 5 | Active |
| US7900207B2 | Interrupt and exception handling for multi-streaming digital processors | Physics | 4 | Active |
| US7661112B2 | Methods and apparatus for managing a buffer of events in the background | Physics | 3 | Active |
| US7406586B2 | Fetch and dispatch disassociation apparatus for multi-streaming processors | Physics | 2 | Active |
| US7551626B2 | Queueing system for processors in packet routing operations | Electricity | 2 | Active |
| US7926062B2 | Interrupt and exception handling for multi-streaming digital processors | Physics | 2 | Active |
| US7636836B2 | Fetch and dispatch disassociation apparatus for multistreaming processors | Physics | 1 | Active |
| US7765546B2 | Interstream control and communications for multi-streaming digital processors | Physics | 1 | Active |
| US8468540B2 | Interrupt and exception handling for multi-streaming digital processors | Physics | 1 | Active |
| US5815736A | Area and time efficient extraction circuit | Physics | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.