System and method for locating solder bumps on semiconductor chips or chip carriers
US5694482A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 1997 |
| Grant date | Dec 2, 1997 |
| Priority date | — |
| Expiry date | Jan 6, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30152
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An automated vision system for identifying patterns, such as the solder bump patterns or leads of electronic components. The system is capable of correctly identifying the deviations of an imaged pattern from the nominal location of a reference pattern even if the imaged features are displaced more than half the minimum distance between any two adjacent features of the reference pattern. Further, the system is not limited to identifying patterns that have been merely translated relative to the reference pattern, but can be used if the imaged pattern has been rotated more than 45.degree. relative to the reference pattern depending on the symmetry of the pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.