Semiconductor device containing Si, O and N anti-reflective layer
US5698352A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 1997 |
| Grant date | Dec 16, 1997 |
| Priority date | — |
| Expiry date | Mar 19, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S430/151
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of determining an optimum condition of an anti-reflective layer upon forming a resist pattern by exposure with a monochromatic light, forms the anti-reflective layer with these conditions and forms a resist pattern using a novel anti-reflective layer. The method comprises (I) forming an equi-contour line for the amount of absorbed light regarding a photoresist of an optional film thickness using the optical condition of the anti-reflective layer as a parameter, (II) conducting the same procedure as in (I) above for a plurality of resist film thicknesses, (III) finding a common region for the amount of absorbed light with respect to each of the traces obtained, thereby determining the optical condition for the anti-reflective layer, (IV) applying same procedures as described above while changing the condition of the anti-reflective layer, thereby determining the optical condition for the anti-reflective layer, and (V) determining the optimum optical condition such as the kind and the thickness of the anti-reflective layer under a certain condition of the anti-reflective layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.