Turn-off, MOS-controlled, power semiconductor component
US5698867A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 1995 |
| Grant date | Dec 16, 1997 |
| Priority date | — |
| Expiry date | Mar 24, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/655
Abstract
In a MOS-controlled turn-off thyristor (MCT), a conventional integral cell with a combined emitter and short-circuiting function is replaced by a separate DMOS cell (D) and emitter cell (E). The DMOS cell (D) contains a five-layer sequence of cathode short-circuit region (18), first channel region (19), second base layer (7), first base layer (8) and emitter layer (9). The emitter cell (E) contains a four-layer sequence of first emitter region (20), second base layer (7), first base layer (8) and emitter layer (9). This basic structure produces a component which is easy to produce and is distinguished by a high reverse-blocking capability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.