Method for the fabrication of bipolar transistors

US5702958A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• William U. Liu · Plano, US
• Darrell G. Hill · Tempe, US

Key dates

• Filing date: Aug 9, 1994
• Grant date: Dec 30, 1997
• Expiry date: Aug 9, 2014

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/072

Abstract

The invention described herein includes, in one of its forms, a method for fabricating a semiconductor device having ledge material (148, 150, 152, 162) extending over an undercut region. The method comprises the step of forming a layer of material 164 in tensile stress over the undercut region, or region to be undercut. The layer of material in tensile stress can be a dielectric, such as silicon nitride, and provides support for the ledge material in subsequent processing steps.