Multi-level resolution lithography
US5703376A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 5, 1996 |
| Grant date | Dec 30, 1997 |
| Priority date | — |
| Expiry date | Jun 5, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/31761
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A system for lithographic rastering of an image, defined by an array of pixels, onto an image-accepting substrate that allows irradiation of the total pixel pattern in reduced time. The total image is first divided into a collection of one or more geometrically isolated pixel arrays, with all pixels in an array being connected to each other. Each pixel array is decomposed into a fine region, consisting of all image pixels within P pixels of a boundary of that array, where P is a selected positive integer, such as 1, 2 or 3, and a bulk region consisting of all image pixels in that array that are not part of a fine region. A pixel array may include one or more bulk regions and one or more fine regions. A fine region for a pixel array is further decomposed into a first fine sub-region with pixel width at least equal to P1 pixels, where P1 is a selected integer satisfying 2.ltoreq.P1.ltoreq.P, and a second fine sub-region with pixel width no greater than P1-1 pixels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.