Fail-safe method to read a timer which is based on a particular clock with another asynchronous circit
US5703919A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 1996 |
| Grant date | Dec 30, 1997 |
| Priority date | — |
| Expiry date | Apr 17, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG04G5/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus for reading a timer with an asynchronous circuit. A computer system is provided having a system clock and an asynchronous timer clock. The computer system includes a counter clocking from the timer clock and a latch coupled to output of the counter. First logic, synchronized to the timer clock, is coupled to control the latch responsive to a control signal from the computer system. Second logic synchronized to the system clock and coupled to the first logic is configured to provide an indication to the computer system of when the system can read the latched data and be assured of its validity. The computer system will thereby be prevented from reading the timer before it has stabilized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.