Counterflow pipeline processor architecture for semi-custom application specific IC's
US5704054A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 9, 1995 |
| Grant date | Dec 30, 1997 |
| Priority date | — |
| Expiry date | May 9, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pipeline processor provides an instruction flow in a first direction and a data flow in an opposing direction. The pipeline processor includes program circuitry for issuing instructions in the first pipeline direction, with at least some instructions including user-defined operation codes. A result register stores and issues data in the opposing pipeline direction. Plural pipeline stages connect the program circuitry and the result register. A pipeline stage comprises instruction latch circuitry connected to receive and issue instructions in the first pipeline direction, and result latch circuitry connected to receive and issue result data in the opposing pipeline direction. Certain pipeline stages include a conversion module for determining a correspondence between a user-defined operation code and the pipeline operation code and, upon determining such a correspondence, causing the logic circuitry within the pipeline stage to commence execution of the pipeline operation code. Processor siding circuitry is coupled to at least some of the pipeline stages and performs logical operations on the result data in accordance with a pipeline operation code. Multi-threading and branch pred…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.