Inventor · Plano, TX, US

Debashis Bhattacharya

13Patents

7h-index

19Co-inventors

63Inventor score

Filing activity: May 9, 1995 → Nov 30, 2016

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7225423B2	Method for automated design of integrated circuits with targeted quality objectives using dynamically generated building blocks	Physics	223	Expired
US6378090B1	Hierarchical test access port architecture for electronic circuits including embedded core having built-in test access port	Physics	75	Expired
US6425100B1	Snoopy test access port architecture for electronic circuits including embedded core with built-in test access port	Physics	53	Expired
US6381717B1	Snoopy test access port architecture for electronic circuits including embedded core having test access port with instruction driven wake-up	Physics	48	Expired
US7003738B2	Process for automated generation of design-specific complex functional blocks to improve quality of synthesized digital integrated circuits in CMOS using altering process	Physics	22	Expired
US5704054A	Counterflow pipeline processor architecture for semi-custom application specific IC's	Physics	21	Expired
US6782514B2	Context-sensitive constraint driven uniquification and characterization of standard cells	Physics	8	Expired
US9740513B2	System and method for real time virtualization	Physics	5	Active
US6938223B2	Logic circuit having a functionally redundant transistor network	Physics	4	Expired
US10783160B2	System and method for scalable distributed real-time data warehouse	Physics	0	Active
US10817528B2	System and method for data warehouse engine	Physics	0	Active
US10496622B2	System and method for real-time data warehouse	Physics	0	Active
US10185606B2	Scalable autonomic message-transport with synchronization	Physics	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.