Semiconductor device having an ESD protective circuitry
US5706156A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 25, 1996 |
| Grant date | Jan 6, 1998 |
| Priority date | — |
| Expiry date | Jan 25, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/611
Abstract
A semiconductor device has a protective circuitry including a common discharge line, a first protective device connected between one of input/output terminals and the discharge line, and a second protective device connected between one of Vcc and ground terminals and the discharge line. The second protective device has an on-resistance as much as 1/2 of the on-resistance of the first protective device. Each of the power terminals and ground terminals generally has a large capacitance to accumulate a large amount of electric charge during a CDM test after charging of the semiconductor device as a whole. The low on-resistance prevents the inner circuit and input/output buffers of the semiconductor device from being applied with a higher potential during subsequent grounding of the semiconductor device in the CDM test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.