Methods of formation of semiconductor composite gate dielectric having multiple incorporated atomic dopants
US5712208A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 1995 |
| Grant date | Jan 27, 1998 |
| Priority date | — |
| Expiry date | May 25, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/923
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor dielectric (10) is formed by providing a base layer (12) having a surface. A thin interface layer (13) is formed at the surface of the base layer (12). The thin interface layer has a substantial concentration of both nitrogen and fluorine. A thermal oxide layer (14) is formed overlying the interface layer (13). A deposited dielectric layer (16) is formed overlying the thermal oxide layer (14). The deposited dielectric layer (16) is optionally densified by a thermal heat cycle. The deposited dielectric layer (16) has micropores that are misaligned to micropores in the thermal oxide layer (14) to provide enhanced features which the nitrogen/fluorine interface further improves the dielectric's features.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.