Keith E. Witek
32Patents
25h-index
20Co-inventors
77Inventor score
Filing activity: Sep 30, 1991 → Jan 26, 1999
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5324683A | Method of forming a semiconductor structure having an air region | Emerging Cross-Sectional Technologies | 505 | Expired |
| US5554870A | Integrated circuit having both vertical and horizontal devices and process for making the same | Electricity | 402 | Expired |
| US5308782A | Semiconductor memory device and method of formation | Electricity | 394 | Expired |
| US5461488A | Computerized facsimile (FAX) system and method of operation | Electricity | 174 | Expired |
| US5510645A | Semiconductor structure having an air region and method of forming the semiconductor structure | Emerging Cross-Sectional Technologies | 162 | Expired |
| US6146970A | Capped shallow trench isolation and method of formation | Electricity | 162 | Expired |
| US6433382B1 | Split-gate vertically oriented EEPROM device and process | Electricity | 150 | Expired |
| US5879971A | Trench random access memory cell and method of formation | Electricity | 123 | Expired |
| US5398200A | Vertically formed semiconductor random access memory device | Emerging Cross-Sectional Technologies | 120 | Expired |
| US5612563A | Vertically stacked vertical transistors used to form vertical logic gate structures | Electricity | 110 | Expired |
| US5705409A | Method for forming trench transistor structure | Electricity | 103 | Expired |
| US6037202A | Method for growing an epitaxial layer of material using a high temperature initial growth phase and a low temperature bulk growth phase | Electricity | 94 | Expired |
| US5414289A | Dynamic memory device having a vertical transistor | Electricity | 89 | Expired |
| US5308778A | Method of formation of transistor and logic gates | Electricity | 83 | Expired |
| US5414288A | Vertical transistor having an underlying gate electrode contact | Electricity | 81 | Expired |
| US5627395A | Vertical transistor structure | Electricity | 77 | Expired |
| US5578850A | Vertically oriented DRAM structure | Electricity | 65 | Expired |
| US5712208A | Methods of formation of semiconductor composite gate dielectric having multiple incorporated atomic dopants | Emerging Cross-Sectional Technologies | 63 | Expired |
| US5340754A | Method for forming a transistor having a dynamic connection between a substrate and a channel region | Electricity | 57 | Expired |
| US5451538A | Method for forming a vertically integrated dynamic memory cell | Electricity | 52 | Expired |
| US5324673A | Method of formation of vertical transistor | Electricity | 52 | Expired |
| US5291438A | Transistor and a capacitor used for forming a vertically stacked dynamic random access memory cell | Electricity | 51 | Expired |
| US5949706A | Static random access memory cell having a thin film transistor (TFT) pass gate connection to a bit line | Emerging Cross-Sectional Technologies | 43 | Expired |
| US5158901A | Field effect transistor having control and current electrodes positioned at a planar elevated surface and method of formation | Emerging Cross-Sectional Technologies | 36 | Expired |
| US5252849A | Transistor useful for further vertical integration and method of formation | Electricity | 26 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.