Process for forming fine pattern for semiconductor device utilizing multiple interlaced exposure masks
US5716758A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 1997 |
| Grant date | Feb 10, 1998 |
| Priority date | — |
| Expiry date | Jun 26, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0334
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
There are disclosed processes for forming fine patterns on a semiconductor substrate to a lesser degree than the resolving power of a step and repeat used, thereby improving the degree of integration of the semiconductor device. The process comprises the steps of: forming a first light-exposure mask and a second light-exposure mask with interlaced patterns selected from a plurality of fine patterns to be formed on a semiconductor substrate; coating an organic material layer on the semiconductor substrate; patterning the organic material layer by use of the first light-exposure mask, to form organic material layer patterns; forming a photosensitive film over the organic material layer patterns; and patterning the photosensitive film by use of the second light-exposure mask to form photosensitive film patterns, in such a way that each of photosensitive film patterns is interposed between two adjacent organic material layer patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.