Method of fabricating a silicon BJT

US5716859A · kind A · utility

Assignee

• Whitaker & Company · US

Inventors

• James Tajadod · Dedham, US
• Timothy E. Boles · Willowdale, US
• Paulette R. Noonan · Dracut, US

Key dates

• Filing date: Oct 31, 1996
• Grant date: Feb 10, 1998
• Expiry date: Oct 31, 2016

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/096

Abstract

A method of fabricating a bipolar junction transistor having emitter line spacings on the order of approximately 0.25 microns or less is disclosed. Windows are opened in the silicon dioxide layer for the emitter collector and base fabrication. A layer of silicon nitride is disposed on top of the layer of silicon dioxide having been deposited over he entire surface containing approximately 0.5 width line features at he emitter, base and collector sites. Silicon nitride is deposited by low pressure chemical vapor deposition (LPCVD). The deposited nitride film is etched using a standard reactive ion etching technique, removing the silicon nitride from the horizontal surfaces of the oxide without removing the nitride from the sidewalls of the etched opening at the emitter, base and collector sites. The result of the RIE etching is that the thickness of the film on the horizontal surfaces is removed without removal of the nitride from the sidewalls of the etched pattern. The resulting spacer produces the window of the original features at the emitter, base and collector by a dimension of approximately 2X the thickness of the deposited silicon nitride.