Method of forming a semiconductor device
US5716866A · kind A · utility
27Cited by
8References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 1, 1995 |
| Grant date | Feb 10, 1998 |
| Priority date | — |
| Expiry date | Dec 1, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A method for forming a unilateral, graded-channel field effect transistor and a transistor stock 200 that includes providing a substrate (10) with an overlying gate electrode (14, 16). A spacer (23) is formed on only the drain side of the electrode. A graded-channel region (36) is formed aligned to the source side of the electrode while the spacer protects the drain side of the channel region. Source/drain regions (38) are formed, the spacer is removed, and then a drain extension region (40) is formed aligned to the drain side of the electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.