Process to fabricate stacked capacitor DRAM and low power thin film transistor SRAM devices on a single semiconductor chip
US5716881A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1996 |
| Grant date | Feb 10, 1998 |
| Priority date | — |
| Expiry date | Mar 28, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
Abstract
A fabrication process for integrating stacked capacitor, DRAM devices, and thin film transistor, SRAM devices, has been developed. The fabrication process features combining key operations used to create transfer gate transistor structures, and access transistor structures for the DRAM and SRAM devices. In addition, process steps, used to create a capacitor structure, for the DRAM device, and a thin film transistor structure, for the SRAM device, are also shared. Another key feature of this invention is a buried contact structure, used for the SRAM device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.