Hetero-junction bipolar transistor

US5719415A · kind A · utility

Assignee

• SHARP KABUSHIKI KAISHA · JP

Inventors

• Motoji Yagura · Nara, JP
• John Twynam · Regensburg, DE
• Hiroya Sato · Sumida, JP
• Toshiaki Kinosada · Izumi, JP
• Koken Yoshikawa · Ikoma, JP

Key dates

• Filing date: Mar 14, 1996
• Grant date: Feb 17, 1998
• Expiry date: Mar 14, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/62

Abstract

A hetero-junction bipolar transistor includes: a substrate; a first conductive type collector layer disposed on the substrate; a second conductive type base layer having an external base region; and a first conductive type emitter layer having a bandgap larger than the bandgap of the base layer disposed in this order, wherein the emitter layer includes a first emitter layer, an etching stop layer, and a second emitter layer disposed in this order starting from the substrate side; a base electrode is formed on the etching stop layer or the first emitter layer disposed on the external base region; a region of the first emitter layer on the base layer has a thickness such that the region is substantially depleted at all voltages applied when the transistor is normally operated; the second emitter layer has an electron affinity equal to or smaller than an electron affinity of the first emitter layer; and the etching stop layer has an electron affinity larger than the electron affinity of the first emitter layer, and has a thickness of approximately 3 nm.