Flash EEPROM with controlled discharge time of the word lines and source potentials after erase
US5719807A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 1996 |
| Grant date | Feb 17, 1998 |
| Priority date | — |
| Expiry date | Jul 25, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Flash EEPROM having at least one memory sector. The memory sector includes a plurality of rows and columns of memory cells; at least one negative voltage generator for generating a negative voltage commonly charging the plurality of rows to a negative potential during an erase pulse for erasing the memory cells of the at least one memory sector and control logic activating the negative voltage generator at the beginning of the erase pulse and deactivating the negative voltage generator at the end of the erase pulse. The Flash EEPROM having for controlling a discharge time of the rows of the at least one memory sector at the end of the erase pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.