Marcello Carrera
11Patents
9h-index
13Co-inventors
61Inventor score
Filing activity: Mar 29, 1995 → Jun 26, 2000
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5784314A | Method for setting the threshold voltage of a reference memory cell | Physics | 66 | Expired |
| US6285614A | Voltage regulator for single feed voltage memory circuits, and flash type memory in particular | Physics | 47 | Expired |
| US6356481B1 | Row decoder for a nonvolatile memory with capability of selectively biasing word lines to positive or negative voltages | Physics | 44 | Expired |
| US5999456A | Flash EEPROM with controlled discharge time of the word lines and source potentials after erase | Physics | 18 | Expired |
| US6184670A | Memory cell voltage regulator with temperature correlated voltage generator circuit | Emerging Cross-Sectional Technologies | 16 | Expired |
| US5719807A | Flash EEPROM with controlled discharge time of the word lines and source potentials after erase | Physics | 16 | Expired |
| US6101118A | Voltage regulator for single feed voltage memory circuits, and flash type memory in particular | Physics | 11 | Expired |
| US5659502A | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices | Physics | 11 | Expired |
| US6433583B1 | CMOS switch circuit for transferring high voltages, in particular for line decoding in nonvolatile memories, with reduced consumption during switching | Electricity | 9 | Expired |
| US5559743A | Redundancy circuitry layout for a semiconductor memory device | Physics | 9 | Expired |
| US5920505A | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices | Physics | 7 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.